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This Tech Talk highlights a full channel simulation that incorporates 3D models of the connector, cable, and PCB. First, the 3D model of the mated connector is presented. The performance analysis of the mated connector, including the test fixture and de-embedding process, is also discussed. To further post-process the simulation data and assess it against SI specifications, the Inspector tool is introduced.
The second part of the Tech Talk presents two different cable configurations for high-speed data transmission: STP (Shielded Twisted Pair) and Coax. Simulations of the cable assemblies with 3D mated connectors are performed, and the TDR impedances are compared.
The third section focuses on full channel simulation incorporating IO buffer modeling (IBIS). Eye diagram plots at different data rates are used to evaluate signal integrity performance. Furthermore, full channel simulation with a longer cable (50 cm) and active IO buffer modeling using IBIS-AMI is presented. The final part of the Tech Talk highlights the integrated MODSIM approach and demonstrates its benefits in accelerating the development process.
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